In microcontroller-based routers, the broad compatibility provided by the use of AUTOSAR software stacks is bought with, depending on the processor load, strongly fluctuating routing latency times of typically 100 μSec up to a few msec. In an FPGA, on the other hand, data flows through an application-specific pipeline and even complex operations, such as resolving the CAN ID to find the routing destination of an incoming message require only a few clock cycles. Parallel processing pipelines are implemented for each interface and operate independently of each other, so that routing latency times of a few μSec per hop are deterministically achievable without extensive optimization. The high performance allows additional security measures through real-time filters, such as Communication Lockdown from GuardKnox.
To implement this function, filters integrated in the FPGA can check all data packets in real time against the CAN database to determine whether signal values are valid. In addition, FPGA filters can monitor the repetition rates of certain cyclic messages, which are also specified in the CAN database, in order to detect sensor errors or possible denial-of-service (DOS) attacks. In both cases, unnecessary data traffic and processing load can be avoided by not forwarding repeated messages and optionally generating programmable status messages.
